AXI-Stream

The XiBIF platform provides an AXI-Stream to sink and source data at high speeds. Streaming herein refers to the ability to continually read/write data. The AXI-Stream specification allows for minimal overhead to start a stream and then for indefinite continuation of data unless either the master or the slave terminates the transfer.

How does Streaming Work?

Using XiBIF, you can write a stream of data to the SoC over ethernet. The data is received in the PS and subsequently stored in the DRAM of the board.

The DRAM acts as a FIFO with pointers indicating the head and tail positions in software. In the PL, two hardware FIFOs are implemented to buffer data between the AXI-Stream bus and the PL to PS standard AXI bus. Each of the FIFOs has a depth of 1024, allowing for less strict data paths between the PS and PL.

When you read/write the stream from your host, you are reading/writing the contents of the DRAM. The data in the stream is guaranteed to be read in the order it was written.

Maximum Stream Rate

When continuously streaming, the AXI-Stream bus can transfer one packet of data (32 bits in our case) per clock cycle. This directly imposes a limit on the master (source) data rate. All master data rates combined may not have a data rate of more than one packet of data per cycle.

Warning

Even if the maximum packet rate per second is kept, data may be lost if the FIFO at the slave inputs is full. This may happen if the master writes data faster than the slave can receive it.