XiBIF Base Classes

class XibifProject(name: str, path)

A serializable class containg XiBIF project information.

The project information can be used to setup custom tooling, folder structures and keep track of project flow.

create_backup() → Path

Create a backup of the whole folder structure of the project.

create_folders(force: bool)

Creates all folders for the project

Args:

force (bool): Should overwrite existing folders?

Raises:

FileExistsError: A file would be overwritten by the action

from_config(project_path: Path, hide_checksum_warning: bool = False)

Populate the contents of a XibifProject class from a project configuration file.

Args:

project_path (Path): The path to the project file. hide_checksum_warning (bool, optional): Hide the checksum warning. Defaults to False.

Raises:

FileNotFoundError: The path to the project file is invalid.

classmethod get_xibif_project_file_name() → str

Get the name of the project file.

Returns:

str: The name of the project file.

nuke_folders()

Remove the whole project folder.

read_config(upgrade: bool = False)

Read a project configuration file.

Raises:

ValidationError: The configuration file is invalid.

remove_folders(ignore_errors: bool = False)

Remove all folders of the project.

Args:

ignore_errors (bool, optional): Ignore errors when removing folders. Defaults to False.

update_config(config_data: dict)

Updates the config of the project.

Args:

config_data (dict): The new configuration data.

Raises:

ValidationError: The configuration file is invalid.

write_config()

Write a project configuration file

class XibifConnection(ip_address: str = '192.168.1.10', verbose: bool = False, uuid: int = None, register_width: int = 32)

A class to interface with a XiBIF board.

The xibif interface allows to easily read, write and stream data from/to an FPGA connected via an ethernet cable. Data transfer takes place via sockets and allows for moderate data rates in the dozens of MBits per second.

class AxiAccessStatus(value)

property bitstreamEnabled: bool

Returns true if the bitstream connection is enabled.

Returns:

True if the bitstream connection is enabled, False otherwise.

Return type:

bool

close() → None

Close the connection to a XiBIF board.

Closes all sockets that are connected to a XiBIF board.

property disable_axi_check_DEC0DEE3_DEADFA11: bool

Returns the status of the AXI check disable flag.

Returns:

True if the AXI check is disabled, False otherwise.

Return type:

bool

echo_test(L: int, N: int) → None

Perform an echo test.

Performs a speed test on the device.

Parameters:

• L (int) – The number of values to send.

• N (int) – The number of times to repeat the test.

property errorPc2Pl: int

Returns the error status from PC to PL.

Returns:

Errorcode from PC to PL. 0 means no error. 1 means AXI-Error, 2 means FIFO overflow. Combinations are possible.

Return type:

int

property errorPl2Pc: int

Returns the error status from PL to PC.

Returns:

Errorcode from PL to PC. 0 means no error. 1 means AXI-Error, 2 means FIFO overflow. Combinations are possible.

Return type:

int

property fifoPc2PlDepth: int

Returns the depth of the FIFO from the PC to the PL.

Returns:

The depth of the FIFO from the PC to the PL.

Return type:

int

property fifoPc2PlFill: int

Returns the fill level of the FIFO from PC to PL.

This method reads the status of the FIFO and returns the fill level, which indicates how many elements are currently stored in the FIFO.

Returns:

The fill level of the FIFO from PC to PL.

Return type:

int

property fifoPl2PcDepth: int

Returns the depth of the FIFO buffer between the PL and PC.

Returns:

The depth of the FIFO buffer.

Return type:

int

property fifoPl2PcFill: int

Retrieves the fill level of the FIFO between the PL and PC.

This method reads the status of the FIFO and returns the fill level, which indicates how many elements are currently stored in the FIFO.

Returns:

The fill level of the FIFO between the PL and PC.

Return type:

int

flush_stream() → None

Flush the hardware FIFOs.

Resets the AXI-Stream by discarding all values in the hardware FIFOs.

property ip_address: str

Returns the IP address of the object.

Returns:

The IP address.

Return type:

str

open(flush: bool = True) → None

Open the connection to a XiBIF board.

Initializes all necessary socket connections. If a connection cannot be established, the function times out.

Parameters:

flush (bool) – If True, the stream is flushed before opening the connection. Defaults to True.

Raises:

Exception – An error occurred while opening a connection or reading the device status.

property pc2PlEnabled: bool

Returns true if the PC to PL stream is enabled.

Returns:

True if the PC to PL stream is enabled, False otherwise.

Return type:

bool

perform_software_reset() → None

Perform a software reset on the XiBIF device.

Resets the XiBIF PL part by performing a software reset. Note: The corresponding reset signal needs to be connected manually. The reset is high for one clock cycle.

Raises:

RuntimeError – The connection is not open.

property pl2PcEnabled: bool

Returns true if the PL to PC stream is enabled.

Returns:

True if the PL to PC stream is enabled, False otherwise.

Return type:

bool

print_status_uart() → None

Print the status of a connected XiBIF device.

Prints the device status to the console.

Raises:

RuntimeError – The connection is not open.

read(addr: int) → int

Read the value of a register.

Reads the value of the given address. If a field in a register has software access type ‘read-only’, zeroes are returned for that field regardless of its content.

Parameters:

addr (int) – The relative address of the register in the register block.

Returns:

The value of the register.

Return type:

int

read_axi(addr: int) → int

Read the value of an AXI register.

Reads the value of the given AXI address. If a field in a register has software access type ‘read-only’, zeroes are returned for that field regardless of its content.

Parameters:

addr (int) – The relative address of the AXI register in the register block.

Returns:

The value of the AXI register.

Return type:

int

Raises:

RuntimeError – Failed to read data from AXI device.

read_status() → None

Read the status of a connected XiBIF device.

Reads the device status from the XiBIF stream registers.

Raises:

• RuntimeError – The connection is not open.

• RuntimeError – Failed to read the device status.

read_stream(length: int) → list[int]

Read a stream of data from the device.

Reads the given number of words (32 bit) from the hardware FIFO. The hardware FIFOs data is produced by an AXI-Stream master.

Parameters:

length (int) – The number of words to read.

Returns:

Data from stream.

Return type:

list(int)

read_stream_all() → list[int]

Read all available data from the stream.

Reads all available data from the hardware FIFO. The hardware FIFOs data is produced by an AXI-Stream master.

Returns:

Data from stream.

Return type:

list(int)

set_debug_uart(enable: bool = False) → None

Set debug output on the XiBIF device.

Enables or disables the debug output on the XiBIF device.

Parameters:

enable (bool) – Enable or disable the debug output. Default is False.

Raises:

RuntimeError – The connection is not open.

property socket_timeout: int

Returns the socket timeout value in seconds.

Returns:

The socket timeout value.

Return type:

int

property verbose: bool

Get the value of the verbose attribute.

The verbos attribute controls the data that is logged to the console.

Returns:

Verbosity

Return type:

bool

property version: str

Returns the version of the Python code.

Returns:

The version of the Python code.

Return type:

str

property versionFW: str

Returns the version of the firmware.

Returns:

The version of the firmware.

Return type:

str

property versionHWReg: str

Returns the version of the hardware user registers.

Returns:

The version of the hardware user registers.

Return type:

str

property versionHWStream: str

Returns the version of the hardware stream registers.

Returns:

The version of the hardware stream registers.

Return type:

str

write(addr: int, data: int) → None

Set the value of a register.

Writes the given value to the given address. The data is sent on the register socket and is mapped to the correct AXI address on the device.

Parameters:

• addr (int) – The relative adress of the register in the register block.

• data (int) – The data to write

write_axi(addr: int, data: int, mask: int = 4294967295) → None

Write data to an AXI address.

Writes the given data to the specified AXI address. The data is sent on the register socket and is mapped to the correct AXI address on the device.

Parameters:

• addr (int) – The relative address of the AXI register in the register block.

• data (int) – The data to write.

• mask (int, optional) – The mask to apply during the write operation. Defaults to 0xFFFFFFFF.

Raises:

RuntimeError – Failed to write data to AXI device.

write_bitstream(path: str, addressStream: int = 1136656384, addressRegs: int = 1137704960) → None

Write a bitstream to the XiBIF device.

The bitstream is sent to the device and written to the PL part of the FPGA.

Parameters:

• path (Path) – The path to the bitstream file.

• addressStream (int, optional) – The address where the XiBIF stream peripheral has on the AXI interface, defaults to 0x43C00000

• addressRegs (int, optional) – The address where the XiBIF register peripheral has on the AXI interface, defaults to 0x43D00000

Raises:

• RuntimeError – The connection is not open.

• RuntimeError – The bitstream file does not exist.

write_stream(data: list[int]) → None

Write a stream of data to the device.

Writes the given stream to the device where it will be written to the hardware FIFO. The data can then be sinked by an AXI-Stream slave.

Parameters:

data (list(int)) – Data to stream

class XibifShell(connect_board: bool, load_reg_file: bool, ip)

do_format(args)

Change the displayed number format

do_load(args)

Load a register file

do_open(args)

Open a connection to board

do_reg(args)

Perform register reads and writes

do_repeat(args)

Repeat a command a number of times

do_status(args)

Print the status of the connected board

do_stream(args)

Read/write the AXI-Stream

do_test(args)

Perform a speedtest of the stream connection

get_read_value(input_value: int) → str

Converts the input integer to a string representation based on the current read format.

Args:

input_value (int): The integer value to be converted.

Returns:

str: The string representation of the input based on READ_FORMAT.

Raises:

ValueError: If the READ_FORMAT is invalid.

get_write_value(input_value: str) → int

Converts the input string to an integer based on the current write format.

Args:

input_value (str): The input string representing the value.

Returns:

int: The integer representation of the input based on WRITE_FORMAT.

Raises:

ValueError: If the WRITE_FORMAT is invalid or the input cannot be converted.

load_registers(regpath)

Dynamically loads the register file and retrieves its contents.