.. rst-class:: break_before

Software Drivers
================

Alongside the hardware, the XiBIF Python package also provides a suite of modules to help you interface with and configure the FPGA.

XiBIF Connection
----------------
The `XibifConnection` class allows you to connect to a XiBIF board and exchange data. To use the API, you need to import as follows:

.. code-block:: python

    from xibif import XibifConnection
    connection = XibifConnection()

You then have access to many useful functions such as:

* open
* close
* read
* write
* read_stream
* write_stream
* flush_stream
* read_axi
* write_axi

The `XibifConnection` class serves as a low-level interface to the board. It translates the human-friendly data types into bytes to be transmitted over a socket.

Register Driver
---------------

This class is dynamically created from the register configuration file. The register driver takes a reference to a `XibifConnection` in the constructor and then lets you interface with the registers and even the fields directly.

Using a register class you can do the following:

.. code-block:: python

    connection = XibifConnection()      # create and open a connection to the FPGA
    connection.open()
    regs = RegMap(connection)           # create the register map with an interface
    regs.my_register = 1                # set a register value
    val = regs.my_register              # read a register value
    assert(val == 1)                
    regs.my_register_bf.my_field_1 = 0  # set a single field value
    regs.my_register = 0                # set the entire register value

.. note:: 
    Pay attention to the ``_bf`` suffix of the register name when you want to access the register.